header

 

Home | Biography | Research | Teaching | Students | Publications | Ongoing Projects | Cryptology Research Group

 

D-RoyChoudhury

 

Dipanwita Roy Chowdhury Professor, 

CSE, IIT Kharagpur.

Conference Publications

2011

1.       Dhiman Saha, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury: PKDPA: An Enhanced Probabilistic Differential Power Attack Methodology. INDOCRYPT 2011, pp 3-2, December 2011.

2.       Sandip Karmakar and Dipanwita Roy Chowdhury. NOCAS : A Nonlinear Hybrid Cellular Automata Based Stream Cipher, AUTOMATA 2011, 17th International Workshop on Cellular Automata and Discrete Complex Systems, November 21-23, 2011, Santiago, Chile.

3.       Jaydeb Bhaumik and Dipanwita Roy Chowdhury. CA-based Diffusion Layer for an SPN-type Block Cipher, AUTOMATA 2011, 17th International Workshop on Cellular Automata and Discrete Complex Systems, November 21-23, 2011, Santiago, Chile.

4.       Santosh Ghosh, Dipanwita Roy Chowdhury: Security of Prime Field Pairing Cryptoprocessor against Differential Power Attack. InfoSecHiComNet 2011, pp 16-29, Haldia, India, October 2011.

5.       Praloy Kr. Biswas, Dipanwita Roy Chowdhury, K. S. Dasgupta: Fast Selective Encryption Scheme for MP3 Files - Using GRAIN Stream Cipher. SECRYPT 2011: pp 414-417, October 2011.

6.       Santosh Ghosh, Dipanwita Roy Chowdhury, and Abhijit Das. High Speed Cryptoprocessor for Eta Pairing on 128-bit Secure Supersingular Elliptic Curves over Characteristic Two Fields. CHES 2011, Nara, Japan, September 2011.

7.       Sandip Karmakar and Dipanwita Roy Chowdhury. Fault Analysis of Grain-128 by Targeting NFSR. Africacrypt 2011, Dakar, Senegal, July 2011.

2010

8.       Santosh Ghosh, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. High Speed Flexible Pairing Cryptoprocessor on FPGA Platform. 4th International Conference on Pairing-based Cryptography - Pairing 2010, LNCS 6487, pp. 450-466, Yamanaka, Japan, December 2010.

9.       Sourav Das and Dipanwita Roy Chowdhury. An Efficient Parametereized and Scalable S-Bos for Stream Ciphers. The 6th China International Conference on Information Security and Cryptology (Inscrypt 2010). Shanghai, China, October 2010.

10.    Santosh Ghosh, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. High Speed Fp Multipliers and Adders on FPGA Platform. DASIP 2010, IEEEXplore, pp. 21-26, Edinburgh, Scotland, October 2010.

11.    Sandip Karmakar, Debdeep Mukhopadhayay, and Dipanwita Roy Chowdhury. CAvium - Strengthening Trivium Stream Cipher Using Cellular Automata, Automata 2010, Nancy, France.

12.    Sandip Karmakar, Debdeep Mukhopadhayay, and Dipanwita Roy Chowdhury. d-Monomial Tests of Nonlinear Cellular Automata for Cryptographic Design, 9th International Conference on Cellular Automat for Research  and Industry  - ACRI 2010, Italy.

13.    Jaydeb Bhaumik, Dipanwita Roy Chowdhury, and Iindrajit Chakrabarti. Null Boundary 90/150 Cellular Automata for Multi-byte Error Correcting Code.  9th International Conference on Cellular Automat for Research  and Industry - ACRI 2010, Italy.

14.    Sourav Das and Dipanwita Roy Chowdhury. Generating Cryptographically Suitable Non-linear Maximum Length Cellular Automata.  9th International Conference on Cellular Automat for Research  and Industry - ACRI 2010, Italy.

2009

15.    Rupsa Chakraborty and Dipanwita Roy Chowdhury. A Novel Seed Selection Algorithm for Test Time Reduction in BIST. Asian Test Symposium 2009, pp. 15-20.

16.    Rupsa Chakraborty and Dipanwita Roy Chowdhury. A Hierarchical Approach Towards System Level Static Timing Verification of SoCs. ICCD 2009.

17.    Rupsa Chakraborty and Dipanwita Roy Chowdhury. A Centralized BIST Infrastructure Design for Stuck-At Fault Detection In SoC. IEEE/VSI VLSI Design and Test Symposium (VDAT) 2009.

18.    Mounita Saha and Dipanwita Roy Chowdhury. An Efficient Group Key Agreement Protocol for Heterogeneous Environment. SECRYPT 2009, pp. 182-189.

19.    Sourav Das and Dipanwita Roy Chowdhury. Prevention of Attacks on Grain Using Cellular Automata. Inscrypt 2009.

20.    Mounita Saha and Dipanwita Roy Chowdhury. A Secure and Efficient Protocol for Group Key agreement in Heterogeneous Environment. CoRR abs/0908.2509, 2009.

21.    Mounita Saha, Indranil Sengupta, and Dipanwita Roy Chowdhury. A DDH-based Group Key Agreement Protocol for mobile environment. IEEE COMSNETS 2009.

22.    Jaydeb Bhaumik and Dipanwita Roy Chowdhury. Nmix: An Ideal Candidate for Key Mixing. SECRYPT 2009, pp. 285-288.

23.    Mayank Varshney and Dipanwita Roy Chowdhury. A New Image Encryption Algorithm using Cellular Automata. SECRYPT 2009. pp. 289-292.

2008

24.    Santosh Ghosh and Dipanwita Roy Chowdhury. Elliptic Curve Based Multi-signature Scheme for Multi-server Systems. IEEE Tencon 2008.

25.    Santosh Ghosh and Dipanwita Roy Chowdhury. Configurable Multicore Processing Unit for Elliptic Curve Cryptography, IEEE/VSI VLSI Design and Test Symposium (VDAT) 2008.

26.    Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. A GF(p) Elliptic Curve Group Operator Resistant Against Side Channel Attacks. ACM Great Lakes Symposium on VLSI (GLSVLSI) 2008, pp. 53-58.

27.    Monjur Alam, Santosh Ghosh, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. Single Chip Encryptor/Decryptor Core Implementation of AES Algorithm. VLSI Design 2008, pp. 693-698.

28.    Jaydeb Bhaumik, Dipanwita Roy Chowdhury, and Indrajit Chakrabarti. An Improved Double Byte Error Correcting Code using Cellular Automata. ACRI 2008, pp. 463-470.

29.    Jaydeb Bhaumik, B. Janakiram, and Dipanwita Roy Chowdhury. Architectural Design of CA-Based Double Byte Error Correcting Codec. ICIIS 2008, pp. 1-6.

30.  Mounita  Saha, Indranil Sengupta, and Dipanwita Roy Chowdhury. A Secure Verfiable key agreement protocol for Mobile Communication. EEE COMSWARE, 2008.

31.  Sourav Das and Dipanwita Roy Chowdhury. An Efficient n×nBoolean Mapping Using Additive Cellular Automata. ACRI 2008, pp. 168-173.

32.  Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, and Chester Rebeiro. Theory of Composing Non-linear Machines with Predictable Cyclic Structures. ACRI 2008, pp. 210-219.

33.  Rupsa Chakraborty and Dipanwita Roy Chowdhury. coreBIST: A Cellular Automata Based Core for Self Testing System-on-Chips. ACRI 2008, pp. 506-511.

34.  Rupsa Chakraborty and Dipanwita Roy Chowdhury. Design of a BIST-Core Using Cellular Automata for IP-core and Interconnect Testing. ReCoSoc 2008.

35.  Rupsa Chakraborty and Dipanwita Roy Chowdhury. Raising the Level of Abstraction for the Timing Verification of System-on-Chips. ISVLSI 2008, pp. 459-462.

36.  Umang Jain and Dipanwita Roy Chowdhury. A framework for Online Authenticated Encryption using Cellular Automata. ICISTM 2008.

2007

37.    Santosh Ghosh, Monjur Alam, Kundan Kumar, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. Preventing the Side-Channel Leakage of Masked AES S-Box. 15th International Conference on Advanced Computing & Communication (ADCOM) 2007, pp. 15-20.

38.    Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, and Indranil Sen Gupta. Effect of Side Channel Attacks on RSA Embedded Devices. IEEE Tencon 2007, pp. 1-4

39.    Santosh Ghosh, Monjur Alam, Indranil Sen Gupta, and Dipanwita Roy Chowdhury. A Robust GF(p) Parallel Arithmetic Unit for Public Key Cryptography. 10th EUROMICRO Conference on Digital System Design - Architectures, Methods and Tools (DSD) 2007, pp. 109-117.

40.    Monjur Alam, Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. Latency Optimized AES-Rijndael with Flexible Mode of Operation, IEEE/VSI VLSI Design and Test Symposium (VDAT) 2007, pp. 413-420.

41.    Monjur Alam, Sonai Ray, Debdeep Mukhopadhyay, Santosh Ghosh, Dipanwita Roy Chowdhury, and Indranil Sen Gutpa. An Area Optimized Reconfigurable Encryptor for AES-Rijndael. Design Automation and Test in Europe (DATE) 2007, pp. 1116-1121.

42.    Debojyoti Bhattacharya, Debdeep Mukhopadhyay, Dhiman Saha, and Dipanwita Roy Chowdhury. Strengthening NLS Against Crossword Puzzle Attack. ACISP 2007, pp. 29-44.

43.    Debojyoti Bhattacharya, Nitin Bansal, Amitava Banerjee, and Dipanwita Roy Chowdhury. A Near Optimal S-Box Design. ICISS 2007, pp. 77-90.

44.    Kundan Kumar, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. Design of a Differential Power Analysis Resistant Masked AES S-Box. INDOCRYPT 2007, pp. 373-383.

45.    Debdeep Mukhopadhyay, Pallavi Joshi, and Dipanwita Roy Chowdhury, An Efficient Design of Cellular Automata Based Cryptographically Robust One-Way Function. VLSI Design 2007, pp. 842-853.

46.  Jaydeb Bhaumik, Dipanwita Roy Chowdhury, and Indrajit Chakrabarti. Design and Implementation of RS(32, 28) Encoder and Decoder using Cellular Automata. 15th International Conference on Advanced Computing and Communications (ADCOM) 2007, pp. 491-496.

47.  Mounita Saha, Dipanwita Roy Chowdhury, and Indranil Sengupta. An Improved End-to-End Secure Authentication Scheme for CDMA Networks. The Fourth IASTED Asian Conference on Communication Systems and Networks, (AsiaCSN), 2007.

48.    Rupsa Chakraborty and Dipanwita Roy Chowdhury. Scheduling of Cores for Power Constrained System-on-Chip Testing. 15th International Conference on Advanced Computing and Communications (ADCOM) 2007, pp. 9-14.

2006

49.    Debojyoti Bhattacharya, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury, A Cellular Automata Based Approach for Generation of Large Primitive Polynomial and Its Application to RS-Coded MPSK Modulation. ACRI 2006, pp.  204-214.

50.    Debdeep Mukhopadhyay and Dipanwita Roy Chowdhury. Generation of Expander Graphs Using Cellular Automata and Its Applications to Cryptography. ACRI 2006, pp. 636-645.

51.    Debdeep Mukhopadhyay and  Dipanwita Roy Chowdhury. R6CRYPT : A New Cryptosystem for Handheld Devices. ICCCE 2006.

52.    Pallavi Joshi, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. Design and Analysis of a Robust and Efficient Block Cipher using Cellular Automata. AINA 2006, pp. 67-71.

53.    Shibaji Banerjee and Dipanwita Roy Chowdhury. Built-In Self-Test for Flash Memory Embedded in SoC. DELTA 2006, pp. 379-384.

54.    Mounita Saha and Dipanwita Roy Chowdhury. Design of Key Establishment Protocol Using One-Way Functions to Avert insider-replay Attack. ICISS 2006, pp. 194-204.

55.    Kundan Kumar, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. A Programmable Parallel Structure to perform Galois Field Exponentiation. ICIT 2006, pp. 277-280.

56.    Shibaji Banerjee, Dipanwita Roy Chowdhury, and Bhargab B. Bhattacharya. An Efficient Scan Tree Design for Compact Test Pattern Set. VLSI Design 2006, pp. 175-180.

57.    Roshni Chatterjee and  Dipanwita Roy Chowdhury. An Efficient FPGA Implementation of a Hash Algorithm Based on cellular Automata. IEEE/VSI VLSI Design and Test Symposium (VDAT) 2006.

58.    Roshni Chatterjee and  Dipanwita Roy Chowdhury. A Cryptographic Hash Algorithm Based on cellular Automata. CSI-EAIT 2006, pp. 27-30.

59.    Shibaji Banerjee and Dipanwita Roy Chowdhury. Built-In Self-Test for Flash Memory Embedded in SOC. IEEE International Workshop on Electronic Design, Test and Applications 2006. pp. 379-384.

2005

60.    Debdeep Mukhopadhyay, Shibaji Banerjee, Dipanwita Roy Chowdhury, and Bhargab B. Bhattacharya, CryptoScan: A Secured Scan Chain Architecture. Asian Test Symposium (ATS) 2005, pp. 348-353.

61.    Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury. Cellular automata based key agreement. ICETE 2005, pp. 262-267.

62.    Debdeep Mukhopadhyay, Abhishek Chaudhary, Arvind Nebhnani, and Dipanwita Roy Chowdhury. CCMEA: Customized Cellular Message Encryption Algorithm for Wireless Networks. ICISS 2005, pp. 217-227.

63.    Roshni Chatterjee, Moiz A. Saifee, and Dipanwita Roy Chowdhury. Modifications of SHA-0 to Prevent Attacks. ICISS 2005, pp. 277-289.

64.    Debdeep Mukhopadhyay and Dipanwita Roy Chowdhury. An Efficient End to End Design of Rijndael Cryptosystem in 0.18 ? CMOS. VLSI Design 2005, pp. 405-410.

65.    Debdeep Mukhopadhyay and Dipanwita Roy Chowdhury. Programmable Galois Multiplier Using Cellular Automaton. IEEE/VSI VLSI Design and Test Symposium (VDAT) 2005.

66.    Shibaji Banerjee, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. Computer Aided Test (CAT) Tool for Mixed Signal SOCs. VLSI Design 2005, pp. 787-790.

67.    Shibaji Banerjee, Dipanwita Roy Chowdhury, and Bhargab B. Bhattacharya. A programmable built-in self-test for embedded DRAMs. IEEE International Workshop on Memory Technology, Design, and Testing 2005, pp. 58 – 63.

68.    Shibaji Banerjee and Dipanwita Roy Chowdhury. Computer Aided Bulit-In Self-Diagnosis for Embedded DRAMs. Information Systems: New Generations 2005.

69.    Shibaji Banerjee and Dipanwita Roy Chowdhury. Computer-Aided Test Tool for System-on-Chip. IEEE/VSI VLSI Design and Test Symposium (VDAT) 2005.

2004

70.    Debdeep Mukhopadhyay and Dipanwita Roy Chowdhury. Characterization of a Class of Complemented Group Cellular Automata. ACRI 2004, pp. 775-784.

71.    Debdeep Mukhopadhyay and Dipanwita Roy Chowdhury. Cellular Automata: An Ideal Candidate for a Block Cipher. ICDCIT 2004, pp. 452-457.

72.    Debdeep Mukhopadhyay and Dipanwita Roy Chowdhury. Design of a coprocessor for Galois Field. CODIS 2004.

73.    C. V. Guru Rao and Dipanwita Roy Chowdhury. BIST For System On Chip Using Linear Cellular Automata. CODIS 2004.

74.    Shibaji Banerjee, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. Best repair: an efficient reconfiguration for RRAM. IEEE-Indicon 2004.

75.    Shibaji Banerjee, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. Automatic generated built-in self-test for embedded memory. IEEE-Indicon 2004.

2003

76.    Subhayan Sen, Sk. Iqbal Hossain, Kabirul Islam, Dipanwita Roy Chowdhury, and Parimal Pal Chaudhuri. Cryptosystem Designed for Embedded System Security. VLSI Design 2003, pp. 271-276.

77.    C. V. Guru Rao and Dipanwita Roy Chowdhury. A New Design for Test Technique for Reducing SoC  Test Time. ASP-DAC 2003. pp. 889-882.

78.    Debdeep Mukhopadhyay and Dipanwita Roy Chowdhury. Design and Implementation of Cryptoattack on Secured Embedded Systems. CIT 2003.

79.    C. V. Guru Rao and Dipanwita Roy Chowdhury. A New Strategy and Design for Mixed signal SOC Testing. WRTLT 2003 (in conjunction with ATS 2003).

2002

80.    Subhayan Sen, Chandrama Shaw, Dipanwita Roy Chowdhury, Niloy Ganguly, and Parimal Pal Chaudhuri. Cellular Automata Based Cryptosystem (CAC). ICICS 2002, pp. 303-314.

81.    Subhayu Basu, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, Indranil Sengupta, and Sudipta Bhawmik. Reformatting Test Patterns for Testing Embedded Core Based System Using Test Access Mechanism (TAM) Switch. VLSI Design 2002, pp. 598-603.

82.    C. V. Guru Rao, Debdeep Mukhopadhyay, and Dipanwita Roy Chowdhury. A Design for test Technique for mixed mode SOC Design. IEEE Symposium on System On a Chip 2002, pp. 15-19.

83.    P. V. Monaj Kumar, C. V. Guru Rao, and Dipanwita Roy Chowdhury. An Optimal Scheme of Testing SoCs Using Modified TAM Switch. IEEE Symposium on System On a Chip 2002, pp. 9-14.

2001

84.    Debabrata Bagchi, Dipanwita Roy Chowdhury, Joy Mukherjee, and Santanu Chattopadhyay. A Novel Strategy to Test Core Based Designs. VLSI Design 2001, pp. 122-127.

85.    Debdeep Mukhopadhyay and Dipanwita Roy Chowdhury. Cellular Automata Based Cryptosystem Employing Galois Field 2p algebra. International Symposium on Cellular Automata 2001.

86.    S. Goswami, A Chanda, and Dipanwita Roy Chowdhury. Generation of an ordered Sequence of Test Vectors For Single State Transition Faults. ATS 2001.

87.    C. V. Guru Rao and Dipanwita Roy Chowdhury. Testing of Embedded Core Based Systems Using Linear Cellular Automata. International Symposium on Cellular Automata 2001.

2000

88.    Kolin Paul, Ranadeep Ghosal, Biplab K. Sikdar, Santashil Pal Chaudhuri, and Dipanwita Roy Chowdhury. GF(2p) CA Based Vector Quantization for Fast Encoding of Still Images. VLSI Design 2000, pp. 140-143.

89.    Kolin Paul, Parimal Pal Chaudhuri, and Dipanwita Roy Chowdhury. Scalable Pipelined Micro-Architecture for Wavelet Transform. VLSI Design 2000.

90.    Parimal Pal Chaudhuri, Dipanwita Roy Chowdhury, Kolin Paul, and Biplab K. Sikdar. Theory and Applications of Cellular Automata for VLSI Design and Testing. VLSI Design 2000.

91.    Kolin Paul, Dipanwita Roy Chowdhury. Application of GF(2p) CA in Burst Error Correcting Codes. VLSI Design 2000, pp. 562-567.

1999

92.    Kolin Paul, Dipanwita Roy Chowdhury, and Parimal Pal Chaudhuri. Cellular Automata Based Transform Coding for Image Compression. HiPC 1999, pp. 269-273.

93.    Kolin Paul, P. Dutta, Dipanwita Roy Chowdhury, Prasanta Kumar Nandi, and Parimal Pal Chaudhuri. A VLSI Architecture for On-Line Image Decompression Using GF(28) Cellular Automata. VLSI Design 1999, pp. 532-537.

1997

94.    S Bhattacharyya, S Das, D Saha, Dipanwita Roy Chowdhury, and Parimal Pal Chaudhuri. A Parallel Architecture for Video Compression. VLSI Design 1997.

1996

95.    S. Bhattacharjee, U. Raghavendra, Dipanwita Roy Chowdhury, and Parimal Pal Chaudhuri.  An efficient encoding algorithm for image compression hardware based on cellular automata. HiPC 1996.

1995

96.    Santanu Chattopadhyay and Dipanwita Roy Chowdhury, Subarna Bhattacharjee, and Parimal Pal Chaudhuri. Board level fault diagnosis using cellular automata array. VLSI Design 1995, pp. 343-348.

1994

97.    Dipanwita Roy Chowdhury and Parimal Pal Chaudhuri. Architecture for VLSI Design of CA Based Byte Error Correcting Code Decoders. VLSI Design 1994, pp. 283-286.

1993

98.    Dipanwita Roy Chowdhury, Supratik Chakraborty, B. Vamsi, and Parimal Pal Chaudhuri. Cellular automata based synthesis of easily and fully testable FSMs. ICCAD 1993, pp. 650-653.

99.    Dipanwita Roy Chowdhury, Supratik Chakraborty, and Parimal Pal Chaudhuri. Synthesis of Self-Checking Sequential Machines Using Cellular Automata. VLSI Design 1993.

1992

100.Dipanwita Roy Chowdhury, S. Basu, Indranil Sengupta, and Parimal Pal Chaudhuri. Encoding and decoding of error correcting codes using cellular automata. VLSI Design 1992, pp. 133-136.

101.Dipanwita Roy Chowdhury, Indranil Sengupta, and Parimal Pal Chaudhuri. A fast retrieval memory system design using Cellular Automata. VLSI Design 1992, pp. 157-160.

1991

102.Dipanwita Roy Chowdhury, Indranil Sen Gupta, and Parimal Pal Chaudhuri. A programmable cellular automata structure for built-in self-test. IEEE Tencon 1991, pp. 166-170.

103.Dipanwita Roy Chowdhury, S. Basu, Indranil Sen Gupta, and Parimal Pal Chaudhuri. A novel scheme of designing error correcting codes using cellular automata. IEEE Tencon 1991, pp. 231-235.

104.Indranil Sen Gupta and Dipanwita Roy Chowdhury. A fast fault simulator for sequential logic circuits. IEEE Tencon 1991, pp. 180-184.\

1989

105.Indranil Sen Gupta and Dipanwita Roy Chowdhury. A structured approach to designing digital sequential circuits for testability. NACONECS 1989, pp. 34-36.

106.Dipanwita Roy Chowdhury and Parimal Pal Chaudhuri. Parallel memory testing: a BIST approach. VLSI Design 1989.

1988

107.Indranil Sen Gupta and Dipanwita Roy Chowdhury. A new fault model and its applicability to syndrome and index vector testing. Proc. Seminar on Parallel Processing Systems and their Applications (PPSTA)}, pp. 224-228, Institution of Engineers, Calcutta, India, December 1988.

1987

108.Indranil Sen Gupta and Dipanwita Roy Chowdhury. Design of a Combinational Circuit Tester based on Index Vector Testing. Proc. Intl. Symp. on Electronic Devices, Circuits and Systems, pp. 627--629, I.I.T. Kharagpur, India, December 1987.

 

                                                      For suggestions and comments:  Prof. D. Roychowdhury